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Registered in England No: 4264387
Registered Office:
c/o Bulcock & Co. 10 The Bull Ring, Northwich, Cheshire, CW9 5BS, UK.

Kane Computing Ltd,
Suite I, Ascot Court,
71-73 Middlewich Road,
Northwich,
Cheshire, CW9 7BP
United Kingdom
Tel: +441606351006
Fax: +441606351007
Email: Sales-Support-Marketing
©Copyright: KCL 1986-2012

Federation of Small Businesses

PROCStar III PCIe x8/Ethernet/Standalone Computation Accelerator
PROCStarIII

Features

  • Up to 4 Stratix III 80E, 110E, 260E, 150L or 340L FPGAs
  • 8-lane PCI Express (PCIe x8) host interface
  • Standalone mode with or without Gigabit Ethernet
  • Five level memory structure (supports 65GB+)
  • Supports 5 PROCStar III Daughter Boards (PSDB): Camera Links, User's Ethernet and other interfaces
  • Embedded CPU for immediate RT SW (next version)
  • Up to 4 PSDB_DSP with 3 TI DSPs (next version)
  • Typical system frequencies: 150-350 MHz
  • Flexible clocking system
  • Volatile and non volatile design security
  • Fast direct board to board connection option via SODIMM sockets
  • Supported by GiDEL's PROC Developer's Kits
Ordering Info: Part No. Please Call

Description

The PROCStar III™ system provides a high-capacity, high-speed FPGA-based platform fortified with high throughput and massive memory resulting in a powerful and highly flexible system. The PROCStar III can be hosted via 8-lane PCI Express, 1G Ethernet, or used in future version as a stand-alone system. The performance, memory and add-on daughter boards' flexible architecture enable the system to meet almost any computation needs. In addition to 1GB on-board memory, eight SODIMM sockets provide up to 64GB of memory or additional connectivity
and logic. Abundant memory conjoined with fast PCIe connection enable strong co-processing between a standard PC operating system and the FPGA acceleration. An embedded CPU (next version) offers on-board immediate complex control capability. The PROCStar III system, with GiDEL's PROCDeveloper's Kit and PROC-HIL tool, offers an incredible performance yet supports quick implementation of your unique design. It is done by eliminating the need for a high-speed board design, a PCI Express application driver, board constraints and environment FPGA code. The generated HDL code enables high throughput, easy-to-use parallel access to large memories. As a result, designers can focus on their proprietary value-added design. User designs may be in HDL, C-based, Simulink (graphical design) or any combination of them.

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Downloads

PDF Datasheet (PDF 173KB)

Links

Web Page GiDEL's web site

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