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Registered in England No: 4264387 Registered Office: c/o Bulcock & Co. 10 The Bull Ring, Northwich, Cheshire, CW9 5BS, UK.
Kane Computing Ltd, Cheshire, CW9 7BPSales -Support -Marketing ©Copyright: KCL 1986-2012
GSM Wireless BTS Reference Design
Features
Sets up a call and loopback between two mobile GSM phones
Applies ETSI GSM recommendations
Targets the Lyrtech SFF SDR Development Platform
Best for pico BTSs, GSM monitoring systems, GSM-based sensors, and advanced reprogrammable multimode/SDR handheld communications devices
Ordering Info: Part No. Please Call
Description
This Lyrtech reference design is a DSP-FPGA based GSM design showcasing the powerful combination of a high-end DSP (the Texas Instruments DM6446 digital media SoC) and Virtex-4 FPGA. The implementation shows how these advanced processing devices can be applied to software-defined radio processing in an embedded wireless device. The reference design runs on the Lyrtech SFF SDR Development Platform, developed with TI and Xilinx.
The GSM wireless BTS reference design is a simplified GSM base transceiver station. It uses the Lyrtech GSM protocol stack and establishes basic communications between two GSM devices and the SFF SDR Development Platform that emulates a base transceiver station (BTS) and network functions. It provides most of Layer-1 and Layer-2 modules for the DSP and FPGA, while Layer-3 modules are implemented for basic BTS demonstration purposes. The design uses a mixed design flow - where the protocol layer targetted at the DM6446 is implemented in C/Assembler and the physical layer targetted a the FPGA (all this is accomplished using a model-based design flow).
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